I'm looking for technical documentation on Apple's IEEE 754 implementation on the M1 - M4 chips. Specifically, I'd like to know how NaN payloads are handled in arithmetic operations. Does anyone know where this information is available? Thank you!
Technical specification of IEEE 754 implementation on Apple silicon
You may find it in some ARM architecture specs, if you’re lucky.
Agreed.
The other doc I recommend here is the Apple Silicon CPU Optimization Guide. I’m not sure if it’ll answer your exact question but it’s a great resource when you’re working at this level.
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